time：2023-03-24 02:47:13 source：scripttoolbox.com author：A main board

It is reported that AMD Su Zifeng will visit TSMC to discuss 2nm and 3nm chip production capacity

IT House reported on September 25th, according to Taiwanese media DigiTimes, AMD CEO Su Zifeng and other C-level executives of the company plan to travel to Taiwan from the end of September to early November, intending to meet with TSMC, chip packaging experts and large PC manufacturers. business. Su Zifeng plans to discuss future cooperation with TSMC CEO Wei Zhejia. DigiTimes, citing people familiar with the matter, said the topics of discussion included the use of TSMC's "N3 Plus" fabrication node (likely N3P) and N2 (2nm-class) fabrication technology. In addition, the CEOs of the two companies will discuss plans for future orders, which include technologies that are available or will be available in the near term. IT House understands that TSMC plans to start mass-producing chips on the N2 node sometime in the second half of 2025, so it's time for AMD to start talking about the details of using N2 in its 2026 and beyond products. TSMC's 2nm uses nanosheet architecture for the first time. Compared with the N3E process, the frequency can be increased by 10% to 15% under the same power consumption. At the same frequency, power consumption is reduced by 25% to 30%. Wei Zhejia, President of TSMC, emphasized in the technical forum a few days ago that TSMC's 2nm will be the technology with the best density and best performance. The market is also optimistic that TSMC's 2nm progress will lead its rivals Samsung and Intel. Finally, AMD executives plan to meet with major PC makers like Asus and Acer.

(Responsible editor：System)

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